The invention relates generally to a method for data transmission, and more specifically, to a method for timing recovery for a high-speed data transmission system. The invention relates further to a related timing recovery system for a high-speed data transmission system.
A growing communication bandwidth is a widespread requirement of the information society. The amount of content transmitted, and/or shared over communication lines grows continuously and with it the need for higher data transmission speeds. Data in the original form of digital signals on a sender side of a communication link may arrive as analog signals on the receiver side, affected by signal degradation, phase shifts and noise addition. Thus, the signals received need to be reliably detected in order to allow an interpretation of the original meaning. For this, a reconstruction of the originally used timing of the signals is essential. Sequence detectors are used for detecting a sequence of data symbols communicated via an analog signal transmitted over a communication link, whose output may be sampled on the receiver side. For a given sample sequence received via the communication link, the objective of such detectors is to determine the most likely symbol values for the symbol sequence supplied to the receiver input. In data transmission, a sequence of input symbols drawn from a signal constellation is typically used to modulate some analogue waveform, which is transmitted through a dispersive channel and sampled at the receiver. Those samples would ideally equal the corresponding sender side symbols. However, they are corrupted by noise and interference with neighboring transmitted symbols. The latter phenomenon is commonly referred to as intersymbol interference (ISI). Often used Viterbi detectors (also denoted as Viterbi decoders) use maximum-likelihood detection methods to determine the most probable input symbol sequence. For high-speed data transmission, such detectors play an instrumental role in designing receivers in compliance with the recently approved communication standards, like the IEEE P802.3bj standard for 100 Gb/s Ethernet, and upcoming communication standards, IEEE P802.3bs standard for 400 Gb/s Ethernet.
Typically, sequence detectors comprise a plurality of units and modules working together and processing the incoming analog input signal into digital samples representing the components of one or more symbols. In order to perform a correct symbol detection, it is necessary to derive the most appropriate timing underlying the incoming sequence of symbols. Appropriate phase shift and frequency offset need to be determined in order to get the timing right and interpret the incoming data stream in such a way that—even at the highest communication speed allowed by the transmission channel—the originally sent symbols may be reconstructed without any error or a very small error rate. Techniques like deriving tentative symbol decisions are known from documents of the state-of-the-art. However, in order to increase the communication speed over existing communication lines, the known methods and related systems have to be advanced in order to guarantee a reliable symbol detection at the receiver side of the communication link.